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Data Structures | |
| union | IO32 |
| union | LONGBYTE |
Defines | |
| #define | __attribute__(x) |
| #define | DEFAULT_STG_BASE_ADDRESS 0x200 |
| #define | CNT0_D 0x00 |
| #define | CNT1_D 0x01 |
| #define | CNT0_C 0x02 |
| #define | CNT1_C 0x03 |
| #define | CNT2_D 0x04 |
| #define | CNT3_D 0x05 |
| #define | CNT2_C 0x06 |
| #define | CNT3_C 0x07 |
| #define | CNT4_D 0x08 |
| #define | CNT5_D 0x09 |
| #define | CNT4_C 0x0a |
| #define | CNT5_C 0x0b |
| #define | CNT6_D 0x0c |
| #define | CNT7_D 0x0d |
| #define | CNT6_C 0x0e |
| #define | CNT7_C 0x0f |
| #define | DAC_0 0x10 |
| #define | DAC_1 0x12 |
| #define | DAC_2 0x14 |
| #define | DAC_3 0x16 |
| #define | DAC_4 0x18 |
| #define | DAC_5 0x1a |
| #define | DAC_6 0x1c |
| #define | DAC_7 0x1e |
| #define | ADC_0 0x410 |
| #define | ADC_1 0x412 |
| #define | ADC_2 0x414 |
| #define | ADC_3 0x416 |
| #define | ADC_4 0x418 |
| #define | ADC_5 0x41a |
| #define | ADC_6 0x41c |
| #define | ADC_7 0x41e |
| #define | DIO_A 0x400 |
| #define | DIO_B 0x402 |
| #define | BRDTST 0x403 |
| #define | DIO_C 0x404 |
| #define | MIO_1 0x406 |
| #define | DIO_D 0x401 |
| #define | INTC 0x405 |
| #define | MIO_2 0x407 |
| #define | ODDRST 0x407 |
| #define | TIMER_0 0x408 |
| #define | TIMER_1 0x40a |
| #define | TIMER_2 0x40c |
| #define | TMRCMD 0x40e |
| #define | ICW1 0x409 |
| #define | ICW2 0x40b |
| #define | OCW1 0x40b |
| #define | OCW2 0x409 |
| #define | OCW3 0x409 |
| #define | IRR 0x409 |
| #define | ISR 0x409 |
| #define | IMR 0x40b |
| #define | IXEVN 0x80 |
| #define | IXODD 0x40 |
| #define | LIXEVN 0x20 |
| #define | LIXODD 0x10 |
| #define | EOC 0x08 |
| #define | TP0 0x04 |
| #define | USR_INT 0x02 |
| #define | TP2 0x01 |
| #define | AUTOZERO 0x80 |
| #define | IXLVL 0x40 |
| #define | IXS1 0x20 |
| #define | IXS0 0x10 |
| #define | USRINT 0x08 |
| #define | IA2 0x04 |
| #define | IA1 0x02 |
| #define | IA0 0x01 |
| #define | IRQSL 0x84 |
| #define | A_OUT 0x10 |
| #define | B_OUT 0x02 |
| #define | C_LOW_OUT 0x01 |
| #define | C_HI_OUT 0x08 |
| #define | D_OUT 0x04 |
| #define | _500_MICROSECONDS 500 |
| #define | _1_MILLISECOND 1000 |
| #define | _2_MILLISECONDS 2000 |
| #define | _3_MILLISECONDS 3000 |
| #define | _4_MILLISECONDS 4000 |
| #define | _5_MILLISECONDS 5000 |
| #define | _10_MILLISECONDS 10000 |
| #define | _100_MILLISECONDS 100000L |
| #define | _1_SECOND 1000000L |
| #define | MAX_PERIOD -1L |
| #define | NO_BOARD 1 |
| #define | BOARD_PRESENT 0 |
Functions | |
| char | __attribute__ ((unused)) stg_h[]="$Id |
| unsigned short | BaseFind (void) |
| void | SetIrq (short nRequestedIrq) |
| short int | Initialize (short int nReqInt) |
| int | StartADC (unsigned short wAxis) |
| short | RawADC (unsigned short wAxis) |
| void | EncoderInit (void) |
| void | SelectInterruptPeriod (long) |
| void | ResetIndexLatch (void) |
| void | SelectIndexAxis (unsigned char byAxis, unsigned char byPol) |
| unsigned char | CurrentIRR (void) |
| int | IndexPulseLatch (void) |
| int | RawDAC (short nAxis, double volts) |
| int | EncoderLatch (void) |
| int | EncReadAll (LONGBYTE *lbEnc) |
| long | RawDI (void) |
| void | RawDO (unsigned char byBitNumber, unsigned char bySet0or1, unsigned short nPort) |
| void | RawDOAll (IO32 xOutBits) |
| void | DIODirection (unsigned short nSwDir) |
Variables | |
| WORDBYTE | |
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Definition at line 197 of file stgmembs.c. 00198 {
00199 short i;
00200 unsigned short io_add;
00201
00202 for (i = 15; i >= 0; i--) // search all possible addresses
00203 {
00204 io_add = i * 0x20 + 0x200;
00205 if ( BrdtstOK(io_add) )
00206 return io_add;
00207 }
00208 return(0);
00209 }
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Definition at line 903 of file stgmembs.c. 00904 {
00905 fOutP(wBaseAddress + OCW3, 0x0a); // IRR on next read
00906 return fInP(wBaseAddress + IRRreg);
00907 }
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Definition at line 731 of file stgmembs.c. 00732 {
00733 WORDBYTE wbTransfer;
00734 unsigned short add;
00735 short i;
00736 int max_axes = wAxesInSys;
00737 unsigned short maxAdd;
00738 if(max_axes != 8)
00739 {
00740 max_axes = 4;
00741 }
00742
00743 // static unsigned char byOldByte2[MAX_AXIS];
00744 // static unsigned char byEncHighByte[MAX_AXIS];
00745
00746 if (wNoBoardFlag == NO_BOARD)
00747 {
00748 for (i = 0; i < 8; i++)
00749 {
00750 lbEnc[i].Long = lSimEnc[i];
00751 }
00752 return;
00753 }
00754
00755 // Disable interrupts here? No, the timer will latch new data in the
00756 // hardware anyway. Maybe we should stop the timer? In an interrupt
00757 // service routine, you're synchronized with the timer; so the readings
00758 // will never change while you're reading them. If you're polling, you
00759 // would first latch the encoder counts with the EncoderLatch() function.
00760 // But, the timer could latch the counts again, in the middle of the read.
00761 // A critical section will help in some extreme cases.
00762
00763 // reset counter internal addr ptr to point to first byte
00764 maxAdd = (wBaseAddress + ((max_axes>4)?CNT6_C:CNT2_D));
00765 for (add = wBaseAddress + CNT0_C;
00766 add <= maxAdd;
00767 add +=4)
00768 fOutPW(add, 0x0101);
00769
00770 for (i = 0; i < 3; i++) // 24 bits means get 3 bytes each
00771 {
00772 wbTransfer.Word = fInPW(wBaseAddress + CNT0_D);
00773
00774 lbEnc[0].Byte[i] = wbTransfer.Byte.high;
00775 lbEnc[1].Byte[i] = wbTransfer.Byte.low;
00776
00777 wbTransfer.Word = fInPW(wBaseAddress + CNT2_D);
00778
00779 lbEnc[2].Byte[i] = wbTransfer.Byte.high;
00780 lbEnc[3].Byte[i] = wbTransfer.Byte.low;
00781
00782 if(max_axes >= 8)
00783 {
00784 wbTransfer.Word = fInPW(wBaseAddress + CNT4_D);
00785
00786 lbEnc[4].Byte[i] = wbTransfer.Byte.high;
00787 lbEnc[5].Byte[i] = wbTransfer.Byte.low;
00788
00789 wbTransfer.Word = fInPW(wBaseAddress + CNT6_D);
00790
00791 lbEnc[6].Byte[i] = wbTransfer.Byte.high;
00792 lbEnc[7].Byte[i] = wbTransfer.Byte.low;
00793 }
00794 }
00795
00796 // maintain the high byte, to extend the counter to 32 bits
00797 //
00798 // base decisions to increment or decrement the high byte
00799 // on the highest 2 bits of the 24 bit value. To get the
00800 // highest 2 bits, use 0xc0 as a mask on byte [2] (the third
00801 // byte).
00802
00803 for (i = 0; i < max_axes; i++)
00804 {
00805 // check for -1 to 0 transition
00806
00807 if ( ( (byOldByte2[i] & 0xc0) == 0xc0 ) // 11xxxxxx
00808 && ( (lbEnc[i].Byte[2] & 0xc0) == 0 ) // 00xxxxxx
00809 )
00810 byEncHighByte[i]++;
00811
00812 // check for 0 to -1 transition
00813
00814 if ( ( (byOldByte2[i] & 0xc0) == 0 ) // 00xxxxxx
00815 && ( (lbEnc[i].Byte[2] & 0xc0) == 0xc0 ) // 11xxxxxx
00816 )
00817 byEncHighByte[i]--;
00818
00819 lbEnc[i].Byte[3] = byEncHighByte[i];
00820 byOldByte2[i] = lbEnc[i].Byte[2]; // current byte 2 becomes old one
00821 }
00822 };
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Definition at line 462 of file stgmembs.c. 00463 {
00464 LONGBYTE enc[8];
00465 unsigned short wAdd,wA;
00466 unsigned short const wTestPat = 0x5aa5;
00467
00468 if (wNoBoardFlag == NO_BOARD)
00469 {
00470 wAxesInSys = MAX_AXIS;
00471 return;
00472 }
00473
00474 // It is possible that the encoder counts are being held by battery
00475 // backup, so we'll read the encoders, and save the values
00476 // Then we'll initialize the encoder chips, since it's more likely that
00477 // the ecoders were not kept alive by battery and need to be initialized
00478
00479 EncReadAll(enc);
00480
00481 // probably the right thing is to sign extend the 24 bits, so, instead
00482 // of a 24 bit unsigned count, we have +/- 23 bits.
00483
00484 // for ( i = 0; i < 8; i++)
00485 // {
00486 // byEncHighByte[i] = enc[i].Byte[2] & 0x80 ? 0xff : 0;
00487 // byOldByte2[i] = enc[i].Byte[2];
00488 // }
00489
00490 for (wAdd = wBaseAddress + CNT0_C;
00491 wAdd <= wBaseAddress + CNT6_C; wAdd +=4)
00492 {
00493 // we're going to be slick and do two chips at a time, that's why
00494 // the registers are arranged data, data, control, control. You
00495 // can do two at a time, by using word operations, instead of
00496 // byte operations. Not a big deal for initializing, but reading is
00497 // done pretty often.
00498
00499 fOutPW(wAdd, 0x2020); // master reset
00500
00501 // Set Counter Command Register - Input Control, OL Load (P3),
00502 // and Enable Inputs A and B (INA/B).
00503
00504 fOutPW(wAdd, 0x6868);
00505
00506 // Set Counter Command Register - Output Control
00507
00508 fOutPW(wAdd, 0x8080);
00509
00510 // Set Counter Command Register - Quadrature
00511
00512 fOutPW(wAdd, 0xc3c3);
00513
00514 fOutPW(wAdd, 0x0404); //reset counter to zero
00515 }
00516
00517 // Figure out how many axes are on the card
00518
00519 for ( wA = wBaseAddress + CNT0_D; wA <= wBaseAddress + CNT6_D; wA +=4)
00520 {
00521
00522 // reset address pointer
00523
00524 fOutPW(wA + 2, 0x0101);
00525
00526 // write a pattern to the preset register
00527
00528 fOutPW(wA, wTestPat);
00529 fOutPW(wA, wTestPat);
00530 fOutPW(wA, wTestPat);
00531
00532 // transfer the preset register to the count register
00533
00534 fOutPW(wA + 2, 0x0909);
00535
00536 // transfer counter to output latch
00537
00538 fOutPW(wA + 2, 0x0202);
00539
00540 // read the output latch and see if it matches
00541
00542 if (fInPW(wA) != wTestPat)
00543 break;
00544 if (fInPW(wA) != wTestPat)
00545 break;
00546 if (fInPW(wA) != wTestPat)
00547 break;
00548
00549 // now replace the values that you saved previously, in case the
00550 // encoder was battery backed up
00551
00552 fOutP(wA, enc[wAxesInSys].Byte[0]);
00553 fOutP(wA, enc[wAxesInSys].Byte[1]);
00554 fOutP(wA, enc[wAxesInSys].Byte[2]);
00555
00556 fOutP(wA + 1, enc[wAxesInSys + 1].Byte[0]);
00557 fOutP(wA + 1, enc[wAxesInSys + 1].Byte[1]);
00558 fOutP(wA + 1, enc[wAxesInSys + 1].Byte[2]);
00559
00560 // transfer the preset register to the count register
00561
00562 fOutPW(wA + 2, 0x0909);
00563
00564 wAxesInSys += 2;
00565
00566 // write zeros to preset register, we don't want to do a master reset
00567 // (MRST), because then we would need to re-initialize the counter
00568
00569 // fOutPW(wA, 0);
00570 // fOutPW(wA, 0);
00571 // fOutPW(wA, 0);
00572
00573 // reset counter, BRW and CRY and address pointer (RADR)
00574
00575 // fOutPW(wA + 2, 0x0505);
00576 }
00577 };
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Definition at line 1386 of file stgmembs.c. 01387 {
01388 #if 0
01389 unsigned short wAdd;
01390 #endif
01391 int max_axes = wAxesInSys;
01392 if (wNoBoardFlag == NO_BOARD)
01393 {
01394 return;
01395 }
01396 if(max_axes != 8)
01397 {
01398 max_axes = 4;
01399 }
01400
01401 // normally you'll have the timer latch the data in hardware, but
01402 // if the timer isn't running, we need to latch it ourselves.
01403 #if 0
01404 for ( wAdd = wBaseAddress + CNT0_C; wAdd <= wBaseAddress + CNT6_C; wAdd +=4)
01405 fOutPW(wAdd, 0x0303);
01406 #endif
01407
01408 /* BUG FIX-- don't go past 4 axes on 4 axis board */
01409 fOutPW(wBaseAddress + CNT0_C, 0x0303);
01410 fOutPW(wBaseAddress + CNT2_C, 0x0303);
01411 if (max_axes > 4) {
01412 fOutPW(wBaseAddress + CNT4_C, 0x0303);
01413 fOutPW(wBaseAddress + CNT6_C, 0x0303);
01414 }
01415
01416 };
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Definition at line 914 of file stgmembs.c. 00915 {
00916 // routine for Model 1 board
00917
00918 // poll the latched index pulse of the axis that was previously set up
00919
00920 unsigned char byIRR, byAxisMask;
00921
00922 byIRR = CurrentIRR();
00923 byAxisMask = (byIndexPollAxis & 1) ? LIXODD : LIXEVN; // even or odd axis?
00924 if (byIRR & byAxisMask) // check latched index pulse
00925 return 1;
00926 return 0;
00927
00928 //
00929 // a faster, but messier way
00930 //
00931 //fOutP(wBaseAddress + OCW3, 0x0a); // IRR on next read
00932 //
00933 //return ( fInP(wBaseAddress + IRR)
00934 // & ( (byIndexPollAxis & 1) ? LIXODD : LIXEVN ) // mask for even or odd
00935 // );
00936 }
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Definition at line 382 of file stg.c. Referenced by stgAdcRead(), and stgAioRead().
00383 {
00384 short ret;
00385 short j;
00386
00387 if (wAxis > 7)
00388 return -1;
00389
00390 /*
00391 there must have been a delay between StartADC() and RawADC(),
00392 of 19 usec if autozeroing (we are), 4 uses otherwise. In code
00393 that calls this, make sure you split these calls up with some
00394 intervening code
00395 */
00396
00397 /* make sure conversion is done, assume polling delay is done.
00398 EOC (End Of Conversion) is bit 0x08 in IIR (Interrupt Request
00399 Register) of Interrupt Controller. Don't wait forever though
00400 bail out eventually. */
00401
00402 for (j = 0; !(_inp(STG_BASE_ADDRESS + IRR) & 0x08) && (j < 1000); j++);
00403
00404 ret = _inpw(STG_BASE_ADDRESS + ADC_0 + (wAxis << 1));
00405
00406 if (ret & 0x1000) /* is sign bit negative? */
00407 ret |= 0xf000; /* sign extend */
00408 else
00409 ret &= 0xfff; /* make sure high order bits are zero. */
00410
00411 return ret;
00412 };
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Definition at line 829 of file stgmembs.c. 00830 {
00831 // routine for Model 1
00832
00833 fInP(wBaseAddress + ODDRST); //lint !e534 reset index pulse latch for ODD axis
00834 fInP(wBaseAddress + BRDTST); //lint !e534 reset index pulse latch for EVEN axis
00835 }
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||||||||||||
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Definition at line 584 of file stgmembs.c. 00585 {
00586 if (wNoBoardFlag == NO_BOARD)
00587 {
00588 return;
00589 }
00590
00591 if (lPeriodSelect != MAX_PERIOD)
00592 {
00593 fOutP(wBaseAddress + TMRCMD, 0x56); // timer 1, read/load LSB (MSB is 0)
00594 // mode 3 (square wave)
00595 fOutP(wBaseAddress + TIMER_1, 0xb4); // 0xb4 = 180 -> 25 uSec period
00596 }
00597 else
00598 {
00599 fOutP(wBaseAddress + TMRCMD, 0x76); // timer 1, read/load LSB then MSB
00600 // mode 3 (square wave)
00601 fOutP(wBaseAddress + TIMER_1, 0xff); // LSB
00602 fOutP(wBaseAddress + TIMER_1, 0xff); // MSB
00603 }
00604
00605 switch (lPeriodSelect)
00606 {
00607 case _500_MICROSECONDS:
00608 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00609 // MSB, mode 2 (real-time interrupt)
00610 fOutP(wBaseAddress + TIMER_0, 0x14); // 0x14 = 20 = .5 mS
00611 fOutP(wBaseAddress + TIMER_0, 0x00);
00612 break;
00613 case _1_MILLISECOND:
00614 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00615 // MSB, mode 2 (real-time interrupt)
00616 fOutP(wBaseAddress + TIMER_0, 0x28); // 0x28 = 40 = 1 mS
00617 fOutP(wBaseAddress + TIMER_0, 0x00);
00618 break;
00619 case _2_MILLISECONDS:
00620 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00621 // MSB, mode 2 (real-time interrupt)
00622 fOutP(wBaseAddress + TIMER_0, 0x50); // 0x50 = 80 = 2 mS
00623 fOutP(wBaseAddress + TIMER_0, 0x00);
00624 break;
00625 case _3_MILLISECONDS:
00626 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00627 // MSB, mode 2 (real-time interrupt)
00628 fOutP(wBaseAddress + TIMER_0, 0x78); // 0x78 = 120 = 3 mS
00629 fOutP(wBaseAddress + TIMER_0, 0x00);
00630 break;
00631 case _4_MILLISECONDS:
00632 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00633 // MSB, mode 2 (real-time interrupt)
00634 fOutP(wBaseAddress + TIMER_0, 0xA0); // 0xA0 = 160 = 4 mS
00635 fOutP(wBaseAddress + TIMER_0, 0x00);
00636 break;
00637 case _5_MILLISECONDS:
00638 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00639 // MSB, mode 2 (real-time interrupt)
00640 fOutP(wBaseAddress + TIMER_0, 0xC8); // 0xC8 = 200 = 5 mS
00641 fOutP(wBaseAddress + TIMER_0, 0x00);
00642 break;
00643 case _10_MILLISECONDS:
00644 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00645 // MSB, mode 2 (real-time interrupt)
00646 fOutP(wBaseAddress + TIMER_0, 0x90); // 0x0190 = 400 = 10 mS
00647 fOutP(wBaseAddress + TIMER_0, 0x01);
00648 break;
00649 case _100_MILLISECONDS:
00650 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00651 // MSB, mode 2 (real-time interrupt)
00652 fOutP(wBaseAddress + TIMER_0, 0xA0); // 0x0FA0 = 4000 = 100 mS
00653 fOutP(wBaseAddress + TIMER_0, 0x0F);
00654 break;
00655 case _1_SECOND:
00656 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00657 // MSB, mode 2 (real-time interrupt)
00658 fOutP(wBaseAddress + TIMER_0, 0x40); // 0x9C40 = 40000 = 1 S
00659 fOutP(wBaseAddress + TIMER_0, 0x9c);
00660 break;
00661 case MAX_PERIOD:
00662 fOutP(wBaseAddress + TMRCMD, 0x34); // timer 0, read/load LSB followed by
00663 // MSB, mode 2 (real-time interrupt)
00664 fOutP(wBaseAddress + TIMER_0, 0xff); // LSB
00665 fOutP(wBaseAddress + TIMER_0, 0xff); // MSB
00666 break;
00667 default:
00668 // wrong input? then don't change it
00669 break;
00670 }
00671 };
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Definition at line 313 of file stgmembs.c. 00314 {
00315 if (wNoBoardFlag == NO_BOARD)
00316 {
00317 return;
00318 }
00319
00320 if (wAxis > 7)
00321 return;
00322
00323 if (wModel == MODEL1)
00324 {
00325 // do a dummy read from the ADC, just to set the input multiplexer to
00326 // the right channel
00327 fInPW(wBaseAddress + ADC_0 + (wAxis << 1)); //lint !e534
00328
00329 // wait 4 uS for settling time on the multiplexer and ADC
00330 // you probably shouldn't really have a delay in
00331 // a driver.
00332 Timer2Delay(28);
00333
00334 // now start conversion.
00335 fOutPW(wBaseAddress + ADC_0 + (wAxis << 1), 0);
00336 }
00337 else // Model 2
00338 {
00339 unsigned char Cntrl0;
00340
00341 Cntrl0 = fInP(wBaseAddress + CNTRL0) & 0x07; // save irq
00342
00343 Cntrl0 |= (wAxis << 4) | 0x88; // shift bits to AD2, AD1, AD0
00344 // set bit 0x80 high for autozero
00345 // set bit 0x08 high, not calibrating
00346 fOutP(wBaseAddress + CNTRL0, Cntrl0); // select ADC channel
00347
00348 // don't have to do a dummy read for a model 2
00349
00350 // wait 4 uS for settling time on the multiplexer and ADC
00351 // you probably shouldn't really have a delay in
00352 // a driver.
00353 Timer2Delay(28);
00354
00355 // now start conversion.
00356 fOutPW(wBaseAddress + ADC, 0);
00357
00358 }
00359 };
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Definition at line 37 of file stg.h. 00037 : stg.h,v 1.6 2001/10/30 23:34:05 paul_c Exp $";
00038
00039 /*
00040 Number of axes in system defaults to 4. If STG_8_AXES is defined
00041 by compiler directive or other means, code will support 8 axes,
00042 e.g., -DSTG_8_AXES. Note that only 6 axes are really supported, since
00043 there is not enough digital IO for limit and home switches for all 8.
00044
00045 Analog input is an option, normally not present. If STG_ANALOG_INPUT is
00046 defined by compiler directive or other means, code will support analog
00047 input, e.g., -DSTG_ANALOG_INPUT
00048 */
00049
00050 /*
00051 Base address defaults to 0x200
00052 */
00053 #define DEFAULT_STG_BASE_ADDRESS 0x200
00054 extern unsigned short STG_BASE_ADDRESS;
00055 extern int FIND_STG_BASE_ADDRESS;
00056
00057
00058 /* decls for external interface */
00059
00060 extern int stgMotInit(const char * stuff);
00061 extern int stgMotQuit(void);
00062
00063 extern int stgAdcNum(void);
00064 extern int stgAdcStart(int adc);
00065 extern void stgAdcWait(void);
00066 extern int stgAdcRead(int adc, double * volts);
00067
00068 extern int stgDacNum(void);
00069 extern int stgDacWrite(int dac, double volts);
00070 extern int stgDacWriteAll(int max, double * volts);
00071
00072 extern int stgEncoderSetIndexModel(unsigned int model);
00073 extern int stgEncoderNum(void);
00074 extern int stgEncoderRead(int encoder, double * counts);
00075 extern int stgEncoderReadAll(int max, double * counts);
00076 extern int stgEncoderResetIndex(int encoder);
00077 extern int stgEncoderReadLatch(int encoder, int * flag);
00078 extern int stgEncoderReadLevel(int encoder, int * flag);
00079
00080 extern int stgMaxLimitSwitchRead(int axis, int * flag);
00081 extern int stgMinLimitSwitchRead(int axis, int * flag);
00082
00083 extern int stgHomeSwitchRead(int axis, int * flag);
00084
00085 extern int stgAmpEnable(int axis, int enable);
00086 extern int stgAmpFault(int axis, int * fault);
00087
00088 extern int stgDioInit(const char * stuff);
00089 extern int stgDioQuit(void);
00090
00091 extern int stgDioMaxInputs(void);
00092 extern int stgDioMaxOutputs(void);
00093 extern int stgDioRead(int index, int *value);
00094 extern int stgDioWrite(int index, int value);
00095 extern int stgDioCheck(int index, int *value);
00096 extern int stgDioByteRead(int index, unsigned char *byte);
00097 extern int stgDioShortRead(int index, unsigned short *sh);
00098 extern int stgDioWordRead(int index, unsigned int *word);
00099 extern int stgDioByteWrite(int index, unsigned char byte);
00100 extern int stgDioShortWrite(int index, unsigned short sh);
00101 extern int stgDioWordWrite(int index, unsigned int word);
00102 extern int stgDioByteCheck(int index, unsigned char *byte);
00103 extern int stgDioShortCheck(int index, unsigned short *sh);
00104 extern int stgDioWordCheck(int index, unsigned int *word);
00105
00106 extern int stgAioInit(const char * stuff);
00107 extern int stgAioQuit(void);
00108
00109 extern int stgAioMaxInputs(void);
00110 extern int stgAioMaxOutputs(void);
00111 extern int stgAioStart(int index);
00112 extern void stgAioWait(void);
00113 extern int stgAioRead(int index, double *volts);
00114 extern int stgAioWrite(int index, double volts);
00115 extern int stgAioCheck(int index, double *volts);
00116 extern int stgModel(void);
00117
00118 typedef union
00119 {
00120 unsigned short Word;
00121 struct {unsigned char high, low;} Byte;
00122 } WORDBYTE;
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1.2.11.1 written by Dimitri van Heesch,
© 1997-2001