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Go to the source code of this file.
Defines | |
| #define | CNT0_D 0x00 |
| #define | CNT1_D 0x01 |
| #define | CNT0_C 0x02 |
| #define | CNT1_C 0x03 |
| #define | CNT2_D 0x04 |
| #define | CNT3_D 0x05 |
| #define | CNT2_C 0x06 |
| #define | CNT3_C 0x07 |
| #define | CNT4_D 0x08 |
| #define | CNT5_D 0x09 |
| #define | CNT4_C 0x0a |
| #define | CNT5_C 0x0b |
| #define | CNT6_D 0x0c |
| #define | CNT7_D 0x0d |
| #define | CNT6_C 0x0e |
| #define | CNT7_C 0x0f |
| #define | DAC_0 0x10 |
| #define | DAC_1 0x12 |
| #define | DAC_2 0x14 |
| #define | DAC_3 0x16 |
| #define | DAC_4 0x18 |
| #define | DAC_5 0x1a |
| #define | DAC_6 0x1c |
| #define | DAC_7 0x1e |
| #define | ADC 0x410 |
| #define | ADC_0 0x410 |
| #define | ADC_1 0x412 |
| #define | ADC_2 0x414 |
| #define | ADC_3 0x416 |
| #define | ADC_4 0x418 |
| #define | ADC_5 0x41a |
| #define | ADC_6 0x41c |
| #define | ADC_7 0x41e |
| #define | CNTRL0 0x401 |
| #define | DIO_A 0x400 |
| #define | DIO_B 0x402 |
| #define | DIO_C 0x404 |
| #define | DIO_D 0x401 |
| #define | PORT_A 0x400 |
| #define | PORT_B 0x402 |
| #define | PORT_C 0x404 |
| #define | PORT_D 0x405 |
| #define | INTC 0x405 |
| #define | BRDTST 0x403 |
| #define | MIO_1 0x406 |
| #define | ABC_DIR 0x406 |
| #define | MIO_2 0x407 |
| #define | D_DIR 0x407 |
| #define | ODDRST 0x407 |
| #define | TIMER_0 0x408 |
| #define | TIMER_1 0x40a |
| #define | TIMER_2 0x40c |
| #define | TMRCMD 0x40e |
| #define | ICW1 0x409 |
| #define | ICW2 0x40b |
| #define | OCW1 0x40b |
| #define | OCW2 0x409 |
| #define | OCW3 0x409 |
| #define | IRRreg 0x409 |
| #define | ISR 0x409 |
| #define | IDLEN 0x409 |
| #define | IMR 0x40b |
| #define | SELDI 0x40b |
| #define | IDL 0x40d |
| #define | CNTRL1 0x40f |
| #define | IXEVN 0x80 |
| #define | IXODD 0x40 |
| #define | LIXEVN 0x20 |
| #define | LIXODD 0x10 |
| #define | EOC 0x08 |
| #define | TP0 0x04 |
| #define | USR_INT 0x02 |
| #define | TP2 0x01 |
| #define | AUTOZERO 0x80 |
| #define | IXLVL 0x40 |
| #define | IXS1 0x20 |
| #define | IXS0 0x10 |
| #define | USRINT 0x08 |
| #define | IA2 0x04 |
| #define | IA1 0x02 |
| #define | IA0 0x01 |
| #define | CNTRL0_AZ 0x80 |
| #define | CNTRL0_AD2 0x40 |
| #define | CNTRL0_AD1 0x20 |
| #define | CNTRL0_AD0 0x10 |
| #define | CNTRL0_CAL 0x08 |
| #define | CNTRL0_IA2 0x04 |
| #define | CNTRL0_IA1 0x02 |
| #define | CNTRL0_IA0 0x01 |
| #define | CNTRL1_WDTOUT 0x80 |
| #define | CNTRL1_INT_G2 0x40 |
| #define | CNTRL1_INT_T0 0x10 |
| #define | CNTRL1_INT_T2 0x20 |
| #define | CNTRL1_NOT_SLAVE 0x08 |
| #define | CNTRL1_SLAVE 0x00 |
| #define | CNTRL1_IEN_G2 0x04 |
| #define | CNTRL1_IEN_T0 0x01 |
| #define | CNTRL1_IEN_T2 0x02 |
| #define | BRDTST_EOC 0x08 |
| #define | IRQSL 0x84 |
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1.2.11.1 written by Dimitri van Heesch,
© 1997-2001