#include "bd_types.h"
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Functions | |
DMA_ADDR_INFO * | getDMAInfo (int board_type, unsigned long addr) |
void | freeDMAInfo (struct DMA_ADDR_INFO *info) |
int | checkForDMADone (struct DMA_ADDR_INFO *info) |
int | DMAScheduleLocalToVMETransfer (struct DMA_ADDR_INFO *info, void *vme_dest, void *local_src, unsigned long bytes) |
int | DMAScheduleVMEToLocalTransfer (struct DMA_ADDR_INFO *info, void *local_dest, void *vme_src, unsigned long bytes) |
int | DMASingleLocalToVMETransfer (struct DMA_ADDR_INFO *info, void *vme_dest, void *local_src, unsigned long bytes) |
int | DMASingleVMEToLocalTransfer (struct DMA_ADDR_INFO *info, void *local_dest, void *vme_src, unsigned long bytes) |
int | DMAStartTransfers (struct DMA_ADDR_INFO *info) |
int | DMAClearScheduledTransfersList (struct DMA_ADDR_INFO *info) |
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Definition at line 312 of file dma.c. Referenced by GLOBMEM::GLOBMEM(), and testDMA().
00313 { 00314 struct DMA_ADDR_INFO *info = 0; 00315 unsigned long vme_bus_enable_control_reg; 00316 unsigned long io_control_reg; 00317 unsigned long a1; 00318 unsigned long enda1; 00319 unsigned long starta1; 00320 int tries = 0; 00321 int addr_found = 0; 00322 unsigned long ticks = 0; 00323 #ifdef VXWORKS 00324 ULONG startTicks = tickGet (); 00325 #endif 00326 info = 00327 (struct DMA_ADDR_INFO *) DEBUG_MALLOC (sizeof (struct DMA_ADDR_INFO)); 00328 if (0 == info) 00329 { 00330 return ((struct DMA_ADDR_INFO *) 0); 00331 } 00332 info->board_type = board_type; 00333 info->addr = addr; 00334 switch (board_type) 00335 { 00336 case VX_MVME162_BOARD_TYPE: 00337 if (0 == info) 00338 { 00339 return 0; 00340 } 00341 if (addr & 3) 00342 { 00343 return 0; 00344 } 00345 info->address_decoder = 0; 00346 info->am = 0; 00347 info->ignore_dma_errors = 1; 00348 if (num_mvme162_dmac_commands < 1) 00349 { 00350 memset (mvme162_dmac_commands_list, 0, 00351 sizeof (struct MVME162_DMAC_COMMAND) * 00352 MAX_MVME162_DMAC_COMMANDS); 00353 num_mvme162_dmac_commands = 0; 00354 } 00355 /* Local Bus to VMEbus Enable Control Register, 2-44 MVME162LX Programmer's Guide */ 00356 vme_bus_enable_control_reg = 00357 (0x0f0000 & *((unsigned long *) 0xFFF4002C)); 00358 if (vme_bus_enable_control_reg & 0x10000) /* Address decoder 1 enabled. */ 00359 { 00360 /* Local Bus Slave (VMEbus Master) Starting Address/Ending Address Register 1, 2-36 MVME162LX Programmer's Guide */ 00361 a1 = *((unsigned long *) 0xFFF40014); 00362 enda1 = (0xFFFF0000 & a1); 00363 starta1 = ((0x0000FFFF & a1) << 16); 00364 if (addr > starta1 && addr < enda1) 00365 { 00366 info->address_decoder = 1; 00367 /* Local Bus Slave (VMEbus Master) Attribute Register 1, 2-42 MVME162LX Programmer's Guide */ 00368 info->am = 0x3f & *((unsigned long *) 0xfff40028); 00369 #ifdef VXWORKS 00370 taskDelay (1); 00371 #endif 00372 addr_found = 1; 00373 } 00374 } 00375 if (vme_bus_enable_control_reg & 0x20000 && !addr_found) /* Address decoder 2 enabled. */ 00376 { 00377 /* Local Bus Slave (VMEbus Master) Starting Address/Ending Address Register 2, 2-36 MVME162LX Programmer's Guide */ 00378 a1 = *((unsigned long *) 0xFFF40018); 00379 enda1 = (0xFFFF0000 & a1); 00380 starta1 = ((0x0000FFFF & a1) << 16); 00381 if (addr > starta1 && addr < enda1) 00382 { 00383 info->address_decoder = 2; 00384 /* Local Bus Slave (VMEbus Master) Attribute Register 2, 2-41 MVME162LX Programmer's Guide */ 00385 info->am = 0x3f & (*((unsigned long *) 0xfff40028) >> 8); 00386 #ifdef VXWORKS 00387 taskDelay (1); 00388 #endif 00389 addr_found = 1; 00390 } 00391 } 00392 if (vme_bus_enable_control_reg & 0x40000 && !addr_found) /* Address decoder 3 enabled. */ 00393 { 00394 /* Local Bus Slave (VMEbus Master) Starting Address/Ending Address Register 3, 2-37 MVME162LX Programmer's Guide */ 00395 a1 = *((unsigned long *) 0xFFF4001C); 00396 enda1 = (0xFFFF0000 & a1); 00397 starta1 = ((0x0000FFFF & a1) << 16); 00398 if (addr > starta1 && addr < enda1) 00399 { 00400 info->address_decoder = 1; 00401 /* Local Bus Slave (VMEbus Master) Attribute Register 3, 2-40 MVME162LX Programmer's Guide */ 00402 info->am = 0x3f & (*((unsigned long *) 0xfff40028) >> 16); 00403 #ifdef VXWORKS 00404 taskDelay (1); 00405 #endif 00406 addr_found = 1; 00407 } 00408 } 00409 if (vme_bus_enable_control_reg & 0x80000 && !addr_found) /* Address decoder 4 enabled. */ 00410 { 00411 /* Local Bus Slave (VMEbus Master) Starting Address/Ending Address Register 4, 2-38 MVME162LX Programmer's Guide */ 00412 a1 = *((unsigned long *) 0xFFF40020); 00413 enda1 = (0xFFFF0000 & a1); 00414 starta1 = ((0x0000FFFF & a1) << 16); 00415 if (addr > starta1 && addr < enda1) 00416 { 00417 info->address_decoder = 1; 00418 /* Local Bus Slave (VMEbus Master) Attribute Register 4, 2-39 MVME162LX Programmer's Guide */ 00419 info->am = 0x3f & (*((unsigned long *) 0xfff40028) >> 24); 00420 #ifdef VXWORKS 00421 taskDelay (1); 00422 #endif 00423 addr_found = 1; 00424 } 00425 } 00426 /* Local Bus to VMEbus I/O Control Register */ 00427 if ((addr & (0xff << 24)) == (0xf0 << 24)) /* A24 space. */ 00428 { 00429 io_control_reg = *((unsigned long *) 0xfff4002c); 00430 if (io_control_reg & (1 << 15)) 00431 { 00432 addr_found = 1; 00433 info->address_decoder = 6; 00434 info->am = 0x0c; 00435 } 00436 } 00437 if (addr_found) 00438 { 00439 while (!mvme162_dma_init (info) && tries > 10) 00440 { 00441 #ifdef VXWORKS 00442 taskDelay (1); 00443 #endif 00444 tries++; 00445 } 00446 return info; 00447 } 00448 00449 00450 DEBUG_FREE (info); 00451 return 0; 00452 00453 default: 00454 break; 00455 } 00456 return info; 00457 } |
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Definition at line 510 of file dma.c. Referenced by testDMA(), and GLOBMEM::~GLOBMEM().
00511 { 00512 if (0 != info) 00513 { 00514 DMAClearScheduledTransfersList (info); 00515 DEBUG_FREE (info); 00516 } 00517 } |
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Definition at line 520 of file dma.c. Referenced by DMAStartTransfers(), GLOBMEM::main_access(), mvme162_dma_init(), one(), and testDMA().
00521 { 00522 unsigned long dmac_status; 00523 unsigned long dmac_control_word; 00524 unsigned long dmac_byte_counter; 00525 unsigned long dmac_table_address_counter; 00526 int done = 0; 00527 int error = 0; 00528 if (info == 0) 00529 { 00530 return 0; 00531 } 00532 switch (info->board_type) 00533 { 00534 case VX_MVME162_BOARD_TYPE: 00535 /* DMAC Status Register, 2-58 MVME162LX Programmer's Guide */ 00536 dmac_status = *((unsigned long *) 0xFFF40048); 00537 done = dmac_status & 1; 00538 error = dmac_status & 0x7e; 00539 if (!done && !error && !dma_command_started) 00540 { 00541 /* DMAC Control Register 1, 2-51 MVME162LX Programmer's Guide */ 00542 dmac_control_word = *((unsigned long *) 0xfff40030); 00543 /* DTBL = 5 */ 00544 if (dmac_control_word & (1 << 5)) 00545 { 00546 /* DMAC Table Address Counter, 2-55 MVME162LX Programmer's Guide */ 00547 dmac_table_address_counter = *((unsigned long *) 0xfff40044); 00548 00549 /* DMAC Byte Counter, 2-55 MVME162LX Programmer's Guide */ 00550 dmac_byte_counter = *((unsigned long *) 0xfff40040); 00551 return (((dmac_table_address_counter & 0x3) != 0) 00552 && (dmac_byte_counter == 0)); 00553 } 00554 else 00555 { 00556 /* DMAC Byte Counter, 2-55 MVME162LX Programmer's Guide */ 00557 dmac_byte_counter = *((unsigned long *) 0xfff40040); 00558 return (dmac_byte_counter == 0); 00559 } 00560 } 00561 if (error) 00562 { 00563 if (!dma_command_started || info->ignore_dma_errors) 00564 { 00565 return 1; 00566 } 00567 #ifdef VXWORKS 00568 if (dma_print_errors) 00569 { 00570 logMsg ("DMA error 0x%X -- %s %s\n", error, 00571 (int) ((error & 0x2) ? "(VMEbus ERR)" : ""), 00572 (int) ((error & 0x4) ? "(Command Table ERR)" : ""), 0, 00573 0, 0); 00574 if (error & 0x8) 00575 logMsg ("(DLTO - DMA Local Bus Timeout ERR)\n", 0, 0, 0, 0, 0, 00576 0); 00577 if (error & 0x10) 00578 logMsg ("(DLOB - DMA Offboard ERR)\n", 0, 0, 0, 0, 0, 0); 00579 if (error & 0x20) 00580 logMsg ("(DLPE - DMA Parity ERR)\n", 0, 0, 0, 0, 0, 0); 00581 if (error & 0x40) 00582 logMsg ("(DLBE - DMA Unknown ERR)\n", 0, 0, 0, 0, 0, 0); 00583 } 00584 #endif 00585 /* Clear DMAC byte counter so next time we'll no we`re done */ 00586 *((unsigned long *) 0xfff40040) = 0; 00587 dma_command_started = 0; 00588 return -1; 00589 } 00590 if (done || error) 00591 { 00592 dma_command_started = 0; 00593 } 00594 return done; 00595 00596 default: 00597 break; 00598 } 00599 return 0; 00600 } |
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Definition at line 603 of file dma.c. Referenced by mvme162_dma_init().
00605 { 00606 struct MVME162_DMAC_COMMAND *mvme162_cmd = 0; 00607 void **next_cmd; 00608 00609 if (info == 0) 00610 { 00611 return -1; 00612 } 00613 switch (info->board_type) 00614 { 00615 case VX_MVME162_BOARD_TYPE: 00616 mvme162_cmd = 00617 (struct MVME162_DMAC_COMMAND *) 00618 &(mvme162_dmac_commands_list[num_mvme162_dmac_commands]); 00619 num_mvme162_dmac_commands++; 00620 mvme162_cmd->control_word = 0; 00621 /* TVME | VINC | LINC */ 00622 mvme162_cmd->control_word |= (1 << 9) | (1 << 10) | (1 << 11); 00623 mvme162_cmd->control_word &= 0xFFFF; 00624 mvme162_cmd->control_word &= ~0x3f; 00625 mvme162_cmd->control_word |= info->am; 00626 mvme162_cmd->local_bus_address = local_src; 00627 mvme162_cmd->vme_bus_address = vme_dest; 00628 mvme162_cmd->byte_count = bytes; 00629 mvme162_cmd->next_command = (void *) 3; 00630 if (dma_command_list == 0 00631 || (((unsigned long) dma_command_list) & 3) != 0) 00632 { 00633 dma_command_list = mvme162_cmd; 00634 /* Table Address Counter, 2-55 MVME162LX Programmer's Guide */ 00635 *((unsigned long *) 0xfff40044) = (unsigned long) dma_command_list; 00636 } 00637 else 00638 { 00639 next_cmd = 00640 &((struct MVME162_DMAC_COMMAND *) dma_command_list)->next_command; 00641 while (*next_cmd != 0 && (((unsigned long) (*next_cmd)) & 3) == 0) 00642 { 00643 next_cmd = 00644 &((struct MVME162_DMAC_COMMAND *) (*next_cmd))->next_command; 00645 } 00646 *next_cmd = mvme162_cmd; 00647 } 00648 return 0; 00649 00650 default: 00651 break; 00652 } 00653 return -1; 00654 } |
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Definition at line 657 of file dma.c. 00659 { 00660 struct MVME162_DMAC_COMMAND *mvme162_cmd = 0; 00661 void **next_cmd; 00662 unsigned long am = 0; 00663 00664 if (info == 0) 00665 { 00666 return -1; 00667 } 00668 switch (info->board_type) 00669 { 00670 case VX_MVME162_BOARD_TYPE: 00671 if (num_mvme162_dmac_commands >= MAX_MVME162_DMAC_COMMANDS) 00672 { 00673 return -1; 00674 } 00675 mvme162_cmd = 00676 (struct MVME162_DMAC_COMMAND *) 00677 &(mvme162_dmac_commands_list[num_mvme162_dmac_commands]); 00678 num_mvme162_dmac_commands++; 00679 mvme162_cmd->control_word = *((unsigned long *) 0xFFF40034); 00680 /* VINC | LINC */ 00681 mvme162_cmd->control_word |= (1 << 10) | (1 << 11); 00682 /* TINC */ 00683 mvme162_cmd->control_word &= ~(1 << 9); 00684 mvme162_cmd->control_word &= ~(0x3f); 00685 mvme162_cmd->control_word |= info->am; 00686 mvme162_cmd->local_bus_address = local_dest; 00687 mvme162_cmd->vme_bus_address = vme_src; 00688 mvme162_cmd->byte_count = bytes; 00689 mvme162_cmd->next_command = (void *) 3; 00690 if (dma_command_list == 0 00691 || (((unsigned long) dma_command_list) & 3) != 0) 00692 { 00693 dma_command_list = mvme162_cmd; 00694 /* Table Address Counter, 2-55 MVME162LX Programmer's Guide */ 00695 *((unsigned long *) 0xfff40044) = (unsigned long) dma_command_list; 00696 } 00697 else 00698 { 00699 next_cmd = 00700 &((struct MVME162_DMAC_COMMAND *) dma_command_list)->next_command; 00701 while (*next_cmd != 0 && (((unsigned long) (*next_cmd)) & 3) == 0) 00702 { 00703 next_cmd = 00704 &((struct MVME162_DMAC_COMMAND *) (*next_cmd))->next_command; 00705 } 00706 *next_cmd = mvme162_cmd; 00707 } 00708 return 0; 00709 00710 default: 00711 break; 00712 } 00713 return -1; 00714 } |
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Definition at line 717 of file dma.c. 00719 { 00720 unsigned long dmac_control_word = 0; 00721 00722 if (info == 0) 00723 { 00724 return -1; 00725 } 00726 dma_command_started = 1; 00727 switch (info->board_type) 00728 { 00729 case VX_MVME162_BOARD_TYPE: 00730 /* Table Address Counter, 2-55 MVME162LX Programmers Guide */ 00731 *((unsigned long *) 0xfff40044) = 0; 00732 00733 /* DMAC Local Bus Address Counter, 2-54 MVME162LX Programmer's Guide */ 00734 *((unsigned long *) 0xfff40038) = (unsigned long) local_src; 00735 00736 /* DMAC VMEbus Address Counter, 2-54 MVME162LX Programmer's Guide */ 00737 *((unsigned long *) 0xfff4003c) = (unsigned long) vme_dest; 00738 00739 /* DMAC Byte Counter, 2-55 MVME162LX Programmer's Guide */ 00740 *((unsigned long *) 0xfff40040) = bytes; 00741 00742 /* DMAC Control Register 2, 2-52 MVME162LX Programmer's Guide */ 00743 dmac_control_word = *((unsigned long *) 0xfff40034); 00744 /* VINC = 11, LINC = 10, TVME=9 */ 00745 dmac_control_word |= (1 << 11) | (1 << 10) | (1 << 9); 00746 /* INTE = 15, */ 00747 dmac_control_word &= ~(1 << 15); 00748 dmac_control_word &= ~(0x3f); 00749 dmac_control_word |= info->am; 00750 *((unsigned long *) 0xfff40034) = dmac_control_word; 00751 00752 /* DMAC Control Register 1, 2-51 MVME162LX Programmer's Guide */ 00753 dmac_control_word = *((unsigned long *) 0xfff40030); 00754 /* DEN = 6 */ 00755 dmac_control_word |= (1 << 6); 00756 /* DWB = 13, DTBL = 5 */ 00757 dmac_control_word &= ~(1 << 13) & ~(1 << 5); 00758 /* Clear status, MPU Status and Interrupt Count Register, 2-57 MVME162LX Programmer's Guide */ 00759 *((unsigned long *) 0xfff40048) = (1 << 11); 00760 *((unsigned long *) 0xfff40030) = dmac_control_word; 00761 return 0; 00762 00763 default: 00764 break; 00765 } 00766 return -1; 00767 } |
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Definition at line 771 of file dma.c. 00773 { 00774 unsigned long dmac_control_word = 0; 00775 unsigned long am = 0; 00776 00777 if (info == 0) 00778 { 00779 return -1; 00780 } 00781 dma_command_started = 1; 00782 switch (info->board_type) 00783 { 00784 case VX_MVME162_BOARD_TYPE: 00785 /* Table Address Counter, 2-55 MVME162LX Programmers Guide */ 00786 *((unsigned long *) 0xfff40044) = 0; 00787 00788 /* DMAC Local Bus Address Counter, 2-54 MVME162LX Programmer's Guide */ 00789 *((unsigned long *) 0xfff40038) = (unsigned long) local_dest; 00790 00791 /* DMAC VMEbus Address Counter, 2-54 MVME162LX Programmer's Guide */ 00792 *((unsigned long *) 0xfff4003c) = (unsigned long) vme_src; 00793 00794 /* DMAC Byte Counter, 2-55 MVME162LX Programmer's Guide */ 00795 *((unsigned long *) 0xfff40040) = bytes; 00796 00797 /* DMAC Control Register 2, 2-52 MVME162LX Programmer's Guide */ 00798 dmac_control_word = *((unsigned long *) 0xfff40034); 00799 /* VINC = 11, LINC = 10 */ 00800 dmac_control_word |= (1 << 11) | (1 << 10); 00801 /* INTE = 15, TVME=9 */ 00802 dmac_control_word &= ~(1 << 15) & ~(1 << 9); 00803 dmac_control_word &= ~(0x3f); 00804 dmac_control_word |= info->am; 00805 *((unsigned long *) 0xfff40034) = dmac_control_word; 00806 00807 /* DMAC Control Register 1, 2-51 MVME162LX Programmer's Guide */ 00808 dmac_control_word = *((unsigned long *) 0xfff40030); 00809 /* DEN = 6 */ 00810 dmac_control_word |= (1 << 6); 00811 /* DWB = 13, DTBL = 5 */ 00812 dmac_control_word &= ~(1 << 13) & ~(1 << 5); 00813 /* Clear status, MPU Status and Interrupt Count Register, 2-57 MVME162LX Programmer's Guide */ 00814 *((unsigned long *) 0xfff40048) = (1 << 11); 00815 *((unsigned long *) 0xfff40030) = dmac_control_word; 00816 return 0; 00817 00818 default: 00819 break; 00820 } 00821 return -1; 00822 } |
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Definition at line 825 of file dma.c. Referenced by mvme162_dma_init(), and testDMA().
00826 { 00827 unsigned long dmac_control_word = 0; 00828 unsigned long dmac_timeout_reg = 0; 00829 unsigned long lvreql; 00830 int i = 0; 00831 00832 if (info == 0) 00833 { 00834 return -1; 00835 } 00836 if (!checkForDMADone (info)) 00837 { 00838 return -1; 00839 } 00840 dma_command_started = 1; 00841 switch (info->board_type) 00842 { 00843 case VX_MVME162_BOARD_TYPE: 00844 if (dma_command_list == 0 00845 || (((unsigned long) dma_command_list) & 3) != 0) 00846 { 00847 return -1; 00848 } 00849 /* Table Address Counter, 2-55 MVME162LX Programmer's Guide */ 00850 *((unsigned long *) 0xfff40044) = (unsigned long) dma_command_list; 00851 00852 /* DMAC Control Register 1, 2-51 MVME162LX Programmer's Guide */ 00853 dmac_control_word = *((unsigned long *) 0xfff40030); 00854 /* Get the normal VME bus Request Level and use it for the DMA requests 00855 also. */ 00856 lvreql = (dmac_control_word & (3 << 8)) >> 8; 00857 dmac_control_word &= ~(0xff); 00858 /* DEN = 6 (Enable DMAC), DTBL = 5(Use Command Table), */ 00859 /* DFAIR=4 (Wait for VME Bus Inactive), */ 00860 /* DRELM=(3-2) (VME Bus Release Mode) { 0=BRx&timer,1=timer,2=BRx,3=BRx|timer */ 00861 /* DREQL=(0-1) (VMEbus Request Level) */ 00862 dmac_control_word |= 00863 (1 << 5) | MVME162_DMA_CONTROL_OPTIONS | (0x3 & 00864 DMA_VMEBUS_REQUEST_LEVEL); 00865 /* DWB = 13 */ 00866 dmac_control_word &= ~(1 << 13); 00867 /* DHALT =7 */ 00868 dmac_control_word &= ~(1 << 7) & ~(1 << 6); 00869 /* Clear MPU status, MPU Status and DMA interrupt Count Register */ 00870 *((unsigned long *) 0xfff40048) = (1 << 11); 00871 00872 /* Clear byte counter */ 00873 *((unsigned long *) 0xfff40040) = 0; 00874 /* Set DMA options */ 00875 *((unsigned long *) 0xfff40030) = dmac_control_word; 00876 /* Clear byte counter */ 00877 *((unsigned long *) 0xfff40040) = 0; 00878 /* DMAC Ton/Toff and VMEbus Global Timeout Control Register, 2-59 MVME162LX Programmer's Guide */ 00879 dmac_timeout_reg = *((unsigned long *) 0xfff4004c); 00880 dmac_timeout_reg &= ~(0xff << 16); 00881 dmac_timeout_reg |= MVME162_DMA_TIMEOUT_OPTIONS; 00882 *((unsigned long *) 0xfff4004c) = dmac_timeout_reg; 00883 /* Check that the settings are still correct. */ 00884 if (*((unsigned long *) 0xfff40044) != 00885 ((unsigned long) dma_command_list) 00886 || *((unsigned long *) 0xfff40030) != dmac_control_word) 00887 { 00888 return -1; 00889 } 00890 /* Enable DMA */ 00891 dmac_control_word |= (1 << 6); 00892 *((unsigned long *) 0xfff40030) = dmac_control_word; 00893 #ifdef VXWORKS 00894 startCommandTicks = tickGet (); 00895 #endif 00896 return 0; 00897 00898 default: 00899 break; 00900 } 00901 return -1; 00902 } |
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Definition at line 905 of file dma.c. Referenced by freeDMAInfo(), and testDMA().
00906 { 00907 void *cmd_ptr; 00908 void *last_cmd_ptr; 00909 unsigned long dmac_control_word; 00910 unsigned long ticks = 0; 00911 #ifdef VXWORKS 00912 ULONG startTicks = tickGet (); 00913 #endif 00914 00915 if (info == 0) 00916 { 00917 return -1; 00918 } 00919 00920 dma_command_started = 0; 00921 switch (info->board_type) 00922 { 00923 case VX_MVME162_BOARD_TYPE: 00924 /* last_cmd_ptr = cmd_ptr = dma_command_list; 00925 while(cmd_ptr != 0 && (((unsigned long) cmd_ptr) & 3) == 0) 00926 { 00927 cmd_ptr = ((struct MVME162_DMAC_COMMAND *)cmd_ptr)->next_command; 00928 DEBUG_FREE(last_cmd_ptr); 00929 } */ 00930 /* DMAC Control Register 1, 2-51 MVME162LX Programmer's Guide */ 00931 dmac_control_word = *((unsigned long *) 0xfff40030); 00932 /* DHALT =7 */ 00933 dmac_control_word |= (1 << 7); 00934 /* DEN = 6 */ 00935 dmac_control_word &= ~(1 << 6); 00936 *((unsigned long *) 0xfff40030) = dmac_control_word; 00937 /* DMAC Byte Counter, 2-55 MVME162LX Programmer's Guide */ 00938 while (*((unsigned long *) 0xfff40040) > 0) 00939 { 00940 /* Clear MPU status, MPU Status and DMA interrupt Count Register */ 00941 if (*((unsigned long *) 0xfff40048) & 0x7f) 00942 { 00943 break; 00944 } 00945 #ifdef VXWORKS 00946 ticks = tickGet () - startTicks; 00947 #else 00948 ticks++; 00949 #endif 00950 if (ticks > 100) 00951 { 00952 #ifdef VXWORKS 00953 displayMemory ((void *) 0xfff40030, 8, 4); 00954 #endif 00955 *((unsigned long *) 0xfff40044) = 0x3; 00956 *((unsigned long *) 0xfff40040) = 0; 00957 return -1; 00958 } 00959 } 00960 /* Table Counter */ 00961 *((unsigned long *) 0xfff40044) = 0x3; 00962 memset (mvme162_dmac_commands_list, 0, 00963 sizeof (struct MVME162_DMAC_COMMAND) * 00964 MAX_MVME162_DMAC_COMMANDS); 00965 num_mvme162_dmac_commands = 0; 00966 dma_command_list = 0; 00967 break; 00968 00969 default: 00970 break; 00971 } 00972 return 0; 00973 } |